Chip on Board Assembly: Die Attach, Wire Bonding and Semiconductor Packaging Considerations
Explore how Chip on Board (COB) assembly combines bare die attach, gold or aluminium wire bonding, substrate design and encapsulation to create compact semiconductor assemblies. This article covers the key process steps, material considerations and design requirements engineers should understand when developing COB prototypes and low-volume semiconductor products.
8/9/202610 min read
Chip on Board assembly, commonly referred to as COB assembly, is a semiconductor packaging method in which a bare semiconductor die is mounted directly onto a printed circuit board, ceramic substrate or another circuit carrier instead of first being enclosed inside a conventional IC package.
Once the bare die is attached, electrical connections are normally created between the semiconductor bond pads and the substrate using fine wire bonding. The assembly may then be protected using glob-top epoxy, selective encapsulation, a lid or another suitable protection method.
The concept appears straightforward. In practice, reliable Chip on Board assembly requires careful coordination between the semiconductor die, substrate, die attach material, pad metallization, wire bonding process, mechanical layout and encapsulation system.
A COB design that ignores any one of these elements can become difficult—or sometimes impossible—to manufacture reliably.
For engineers developing custom ASICs, sensors, MEMS devices, photonics modules, evaluation boards or other compact electronics, COB can nevertheless provide an effective route from bare semiconductor die to a functional electronic assembly.
What Is Chip on Board Assembly?
In a conventional semiconductor package, the silicon die is first assembled into a package such as a QFN, BGA, LGA, SOIC or ceramic carrier. That packaged component is subsequently soldered onto a PCB.
Chip on Board removes the intermediate package.
Instead, the process typically becomes:
Bare semiconductor die → die attach → wire bonding → encapsulation → completed electronic assembly
The die may be attached directly to a PCB or to a ceramic, metalized or specialised substrate.
Removing the conventional package can reduce the overall footprint and assembly height. It can also shorten some electrical interconnect paths and provide greater flexibility when building highly customised systems.
However, COB should not be considered simply as a lower-cost alternative to packaged IC assembly.
The semiconductor die itself becomes part of the PCB-level manufacturing process. Bare-die handling, adhesive control, wire bonding and environmental protection therefore become important design considerations.
Typical Chip on Board Process Flow
Although the exact sequence depends on the device and application, a typical Chip on Board assembly process follows several major steps:
Bare die preparation
→ substrate preparation
→ die attach dispensing
→ die placement
→ adhesive curing
→ wire bonding
→ bond inspection or testing
→ encapsulation
→ final inspection
Each stage influences the next.
For example, an excessive die attach fillet can interfere with wire bonding. Incorrect substrate metallization can prevent reliable second bonds. Excessive wire-loop height can later create problems during glob-top encapsulation.
Good COB manufacturing therefore begins with design-for-assembly rather than simply selecting a die attach epoxy and bonding wire.
Bare Die and Substrate Preparation
Bare semiconductor die may arrive as singulated devices, diced wafers, wafers on frame or devices supplied in Gel-Pak, waffle pack or another suitable carrier.
Before assembly, several characteristics must be understood.
These include:
Die dimensions
Die thickness
Die material
Backside condition
Backside metallization
Bond-pad material
Bond-pad dimensions
Pad pitch
Die edge quality
Dicing chipping
Surface contamination
Damage caused during wafer dicing can become particularly important for thin or brittle semiconductor materials.
The substrate must also be suitable for semiconductor assembly.
A standard PCB designed exclusively for SMT components is not automatically suitable for semiconductor wire bonding.
Important considerations include substrate flatness, surface cleanliness, pad dimensions, surface finish, solder mask openings and the accessibility of the bond pads to the bonding tool.
Possible substrate finishes encountered in microelectronics assembly include ENIG, ENEPIG, electrolytic gold and specialised thick-film or thin-film metallization systems.
Their suitability depends on the bonding wire, process and application.
A finish that performs adequately for soldering does not necessarily provide an ideal wire-bonding surface.
Semiconductor Die Attach for COB
The first permanent assembly operation is normally die attach.
The bare semiconductor die is mounted to the PCB or substrate using an adhesive or another attachment method selected according to the electrical, thermal and mechanical requirements of the device.
Two broad adhesive categories are commonly encountered.
Conductive Die Attach
Conductive die attach materials often contain silver or another conductive filler.
Silver-filled epoxy is widely used when the backside of the semiconductor needs an electrical or thermal connection to the substrate.
Applications can include:
Backside grounding
Electrical connection through the die backside
Improved heat transfer
Power semiconductor attachment
Certain sensor and RF assemblies
The electrical properties of the adhesive are only one consideration.
Dispense volume, bond-line thickness, curing behaviour, voiding and adhesive spread must also be controlled.
Non-Conductive Die Attach
A non-conductive adhesive can be used when an electrically conductive backside connection is not required.
This is common for devices where all electrical connections are made through top-side bond pads.
The material still has to provide sufficient adhesion and dimensional stability during subsequent wire bonding and encapsulation.
Controlling the Die Attach Process
Several die attach variables are particularly important in Chip on Board assembly.
These include:
Adhesive dispense volume
Bond-line thickness
Die placement accuracy
Die tilt
Adhesive fillet
Voiding
Cure temperature
Cure duration
Substrate warpage
Thermal expansion mismatch
Too little adhesive may create incomplete coverage or poor mechanical support.
Too much adhesive creates a different set of problems.
Excess material can bleed beyond the die edge and move into the area required for wire bonding. If the substrate bond pads are already positioned close to the semiconductor die, even a relatively small epoxy fillet may obstruct the bonding tool.
PCB layout and die attach design therefore need to be considered together.
Wire Bonding in Chip on Board Assembly
After the die is attached and the adhesive has been cured, electrical interconnection is usually performed by wire bonding.
The bonding method depends on several factors, including:
Die pad metallization
Substrate pad finish
Wire material
Required electrical current
Bond-pad dimensions
Pad pitch
Device geometry
Thermal limitations
Reliability requirements
Two widely used techniques are gold ball bonding and aluminium wedge bonding.
Gold Ball Wire Bonding
Gold ball bonding traditionally uses fine gold wire to create an electrical connection between the semiconductor die and the substrate.
The first bond is generally formed on the semiconductor pad using a ball created at the end of the wire.
The bonding capillary then forms the required wire loop before creating the second bond on the substrate.
This process can achieve high bonding speeds and is widely used across semiconductor packaging.
Successful ball bonding depends heavily on bond-pad metallurgy and geometry.
Parameters including bond force, ultrasonic energy, bonding temperature and bonding time must be developed for the particular material system.
The wire diameter also influences the minimum practical pad dimensions.
For this reason, the bond-pad layout should be reviewed before PCB fabrication whenever possible.
Aluminium Wedge Wire Bonding
Aluminium wire is commonly used with wedge bonding.
Instead of a ball-shaped first bond, wedge bonding creates a bond directly using the wire and wedge tool.
Aluminium wedge bonding is widely encountered in sensors, power electronics, specialised semiconductor packages and other microelectronics applications.
Different wire diameters can be used depending on the electrical and mechanical requirements.
Fine aluminium wire may be suitable for signal connections, while substantially larger wire can be used where greater current-carrying capability is required.
The correct wire diameter cannot be selected from current alone.
Bond-pad dimensions, die construction, available bonding area and wire-loop geometry must all be considered.
Bond Pad Size and Wire Geometry
One of the most common COB design problems is insufficient bonding area.
Wire diameter, bond footprint and bond-pad dimensions are directly related.
A designer cannot specify a very small bond pad and then independently select a much larger wire diameter.
There must be adequate space for the bond itself as well as manufacturing tolerances.
Other factors include:
Pad-to-pad pitch
Die edge clearance
Wire-loop height
Wire-loop length
Distance between die and substrate pads
Neighbouring component height
Bonding tool access
Long wire loops may increase the risk of wire movement, mechanical instability or wire sweep during subsequent encapsulation.
Where possible, substrate bond pads should therefore be positioned reasonably close to the corresponding die pads.
Down Bonding and Ground Connections
Not every connection in a COB assembly necessarily runs from a die pad directly to a signal pad on the PCB.
Some designs require down bonding, particularly for grounding or electrical connections to nearby substrate metallization.
A device may use multiple ground bonds to reduce electrical impedance or provide the required current path.
This can significantly increase the amount of space required around the die.
PCB designers should therefore avoid placing components, vias, solder mask structures or other obstructions immediately beside areas intended for down bonds.
The available bonding area must also account for the die attach fillet.
If a substrate bond pad is positioned too close to the die edge, adhesive spreading during die placement can partially cover the pad and make subsequent wire bonding difficult.
COB Encapsulation
Bare semiconductor die and fine bonding wires are mechanically vulnerable.
For many applications, some form of protection is therefore required after wire bonding.
One common method is glob-top encapsulation.
An epoxy-based encapsulant is dispensed over the semiconductor die and wire-bond structure, creating a protective covering after curing.
Other approaches can include:
Selective encapsulation
Dam-and-fill encapsulation
Protective lids
Local mechanical covers
The appropriate method depends on the application.
Encapsulant selection requires more than simply choosing a hard-setting epoxy.
Relevant properties can include:
Adhesion
Viscosity
Moisture resistance
Ionic cleanliness
Cure temperature
Coefficient of thermal expansion
Mechanical modulus
Thermal properties
Compatibility with wire and die materials
Poorly selected or poorly controlled encapsulation can lead to wire sweep, delamination, cracking or mechanical stress on the die and bonds.
For this reason, glob top should be treated as part of the semiconductor packaging system rather than a cosmetic coating.
PCB Design Rules for Chip on Board
PCB layout strongly influences whether a COB assembly can be manufactured successfully.
Important considerations include:
Design AreaPractical ConsiderationDie keep-out areaLeave sufficient space around the die for placement, bonding and epoxy filletSubstrate bond padsProvide adequate dimensions for the selected wire and bonding processPad spacingAvoid excessive die-to-substrate bond distancesSurface finishConfirm compatibility with the intended wire bonding processComponentsKeep tall components away from bonding tool access areasWire loopsProvide sufficient vertical and lateral clearanceEncapsulationReserve an appropriate area for glob top or other protectionPCB flatnessExcessive warpage can complicate die placement and bondingGround padsProvide sufficient area where multiple ground bonds are requiredThermal designConsider heat flow from the semiconductor into the substrate
A PCB that works perfectly well for conventional SMT assembly may need considerable modification before it becomes suitable for bare die assembly.
Early review of the PCB design can therefore prevent expensive redesign after fabrication.
COB Versus Conventional Packaged IC Assembly
Chip on Board and conventional packaged IC assembly each have advantages.
Neither is universally superior.
ConsiderationChip on BoardPackaged ICPackage footprintPotentially very smallDetermined by packageAssembly heightPotentially lowPackage adds heightElectrical interconnectCan be relatively shortIncludes internal package connectionsBare-die handlingRequiredNot normally required by PCB assemblerEnvironmental protectionMust be engineeredPackage normally provides protectionDesign flexibilityHighLimited by available packageAssembly complexityHigher at PCB levelEasier for standard SMT productionPrototype flexibilityUseful for specialised buildsExcellent when packaged IC existsWire bondingPerformed directly on final substrateCompleted within IC packageReworkCan be difficultPackaged components may be easier to replace
COB becomes especially valuable where packaged versions of a semiconductor are unavailable, physically too large or unsuitable for the required electrical or mechanical architecture.
Applications of Chip on Board Technology
Chip-on-Board technology appears across a wide range of electronic systems.
Applications may include:
Sensors
MEMS devices
Photonic assemblies
Optoelectronic modules
RF electronics
Industrial electronics
Custom ASIC modules
Semiconductor evaluation boards
Medical electronic development hardware
Automotive electronic modules
Power-control electronics
High-density electronic assemblies
Research devices
Miniaturised electronic systems
The suitability of COB for a particular application depends on environmental, mechanical, electrical and regulatory requirements.
For example, a prototype laboratory sensor and a high-reliability automotive module may both use COB architecture but require very different materials and qualification strategies.
Prototype and Low-Volume COB Assembly
Chip on Board is particularly useful for semiconductor development programmes where a packaged version of the device may not yet exist.
Examples include:
Engineering samples
ASIC evaluation
Sensor development
Device characterisation
Research projects
Qualification builds
Specialised low-volume electronics
Low-volume COB assembly should not be confused with conventional prototype SMT assembly.
Even a small quantity of devices may require considerable process preparation.
The assembler may need to evaluate the die handling method, die attach material, bonding parameters, substrate finish, wire geometry and encapsulation process.
This engineering work can represent a significant portion of the total effort for very small quantities.
Information Required for a COB Assembly Quotation
Providing complete technical information at the quotation stage significantly reduces delays.
A typical technical review requires information in several categories.
CategoryInformation RequiredSemiconductor dieDie dimensions, thickness, material, pad metallization, pad dimensions, pad pitchDie backsideBackside material or metallizationSubstratePCB or ceramic type, dimensions, thicknessBond padsPad metallization and surface finishDie attachConductive or non-conductive requirementWire bondingWire material, wire diameter if specified, bonding diagramAssemblyQuantity and placement requirementsEncapsulationGlob top, lid or other protection requirementDocumentationDie drawing, PCB drawing, Gerber data and assembly drawingElectrical connectionsDie-to-substrate wire map and ground connection requirements
The wire-bond diagram is particularly important.
It should clearly identify which die pad connects to which substrate pad.
For devices with dozens or hundreds of connections, ambiguity at this stage can easily result in an incorrect assembly.
Design-for-Manufacturing Considerations
A technically correct circuit schematic does not automatically produce a manufacturable COB layout.
Several issues repeatedly appear when bare semiconductor devices are integrated directly onto PCBs.
These include:
Bond pads that are too small
Incompatible PCB metallization
Excessive distance between die and PCB pads
Components blocking the bonding tool
Insufficient clearance for the die attach fillet
Very long wire loops
Insufficient space for multiple ground wires
Poor encapsulation clearance
PCB warpage
Die dimensions that differ from the original layout assumptions
Many of these problems can be corrected easily during the design stage but become expensive after PCB fabrication.
For specialised semiconductor assemblies, involving the assembly provider before the substrate layout is frozen can therefore save considerable time.
Chip on Board Assembly at Silicon Craft Technologies
Silicon Craft Technologies supports semiconductor backend and microelectronics assembly requirements involving bare semiconductor devices and custom substrates.
Depending on the device and project requirements, supported processes can include:
Bare die handling
Semiconductor die attach
Conductive epoxy die attach
Non-conductive die attach
Gold ball wire bonding
Aluminium wedge wire bonding
Chip on Board assembly
Prototype semiconductor assembly
Engineering and low-volume production
Encapsulation where applicable
Wafer preparation and related semiconductor backend processes
SICT works with semiconductor companies, electronics developers, research groups and engineering teams requiring specialised semiconductor assembly support in Singapore.
For new COB projects, technical review normally begins with the semiconductor die drawing, substrate design and proposed wire-bond configuration.
This allows potential problems involving bond pads, material compatibility and physical access to be identified before assembly begins.
Conclusion
Reliable Chip on Board assembly depends on considerably more than placing a semiconductor die onto a PCB.
The semiconductor die, substrate, adhesive, metallization, bonding wire and encapsulation system behave as an interconnected packaging structure.
A weakness in one element can affect the entire assembly.
Good COB design therefore begins with understanding the complete system:
die + substrate + adhesive + metallization + wire bond + encapsulation
When these elements are considered together from the beginning, Chip-on-Board technology can provide a highly flexible approach for semiconductor prototypes, specialised electronics and low-volume microelectronics production.
For technical evaluation of a COB assembly, engineers can provide Silicon Craft Technologies with the die drawing, substrate or PCB drawing, wire-bond diagram, required quantity and assembly requirements for review and quotation.
Frequently Asked Questions About Chip on Board Assembly
What is Chip on Board assembly?
Chip on Board assembly is a semiconductor packaging technique where a bare semiconductor die is attached directly to a PCB, ceramic substrate or other circuit carrier. Electrical connections are typically made using wire bonding before the device is encapsulated or otherwise protected.
How is a bare semiconductor die attached to a PCB?
The die can be attached using conductive or non-conductive die attach material. Silver-filled conductive epoxy may be used where backside electrical or thermal conduction is required, while non-conductive adhesives may be suitable when the backside of the die does not require an electrical connection.
What wire is used for COB wire bonding?
Gold and aluminium are commonly used wire materials. The correct choice depends on bond-pad metallization, substrate finish, electrical requirements, wire diameter and the selected bonding process.
Can both gold and aluminium wire be used for COB?
Yes, but not interchangeably for every device. Gold ball bonding and aluminium wedge bonding use different tooling and process conditions, and their suitability depends on the die pads and substrate metallization.
What PCB finish is suitable for wire bonding?
Wire-bondability depends on the exact surface finish and bonding process. ENEPIG, certain gold finishes and specialised bondable metallization systems may be suitable in some applications. The substrate finish should always be reviewed against the proposed wire material and bonding method.
Does every Chip on Board assembly require glob-top encapsulation?
No. Glob top is common because it protects the semiconductor die and fine bonding wires, but some assemblies use lids, selective encapsulation or remain unencapsulated when the operating environment permits.
What information is required to quote a COB assembly?
Typically, the assembler will require the semiconductor die drawing, die dimensions and thickness, pad metallization, PCB or substrate drawing, surface finish, wire-bond map, die attach requirements, quantity and encapsulation requirements.
Can Chip on Board assembly be used for prototype quantities?
Yes. COB is frequently used for semiconductor prototypes, ASIC evaluation, sensor development and engineering builds. Small quantities may still require process development because die attach, wire bonding and material compatibility must be established for the specific device.